Leveraging powerful and energy-efficient FPGA technology and the Mitrion Virtual processor, the new appliance completes complex BLAST-n queries up to 16 times faster than a standard server based on Intel® Itanium® 2 processors, and 10 times faster than a server based on AMD Opteron™ processors . BLAST-n (Basic Local Alignment Search Tool for nucleotides) is the world’s most widely used bioinformatics application.
– source: http://www.sgi.com/company_info/newsroom/press_releases/2007/april/blastn.html
I wonder: are there some loops in blender’s internal or external renders that could really scream if given an FPGA-based implementation? The article also cites that one way to look at the speed increase is also in terms of power savings: 90% less power required to do the same task. Any performance measurement freaks reading this list?
i could be wrong, but i don’t think the majority of our user base is going to be getting these appliances on their desktop any time soon. Blender is going toward distributed rendering (on PC’s) and frameservers.
It’s going to take a while, but PCI boards with generic coprocessors isn’t out of the question. A more immediate target would be GPUs, which are rather good at the type of processing we do. Both would however require quite a lot of work.
Oh my god I want one. £12 grand, tempting…
Unlike other FPGA offerings that require extensive end-user optimization, the SGI RASC Appliance for Bioinformatics is a pre-configured solution that dramatically simplifies the deployment of a platform for running nucleotide sequence queries using BLAST-n.
Of course FPGAs can speed up very specialized tasks tremendously, but programming them is still far from regular software design…this is a preconfigured solution for BLAST-n, since otherwise it would still require a lot of development to use an FPGA for it.
With an FPGA you program hardware not software, you cannot use traditional high-level languages like C or C++. Although they have developed Mitrion-C and claim it takes away the need to master hardware design, the code doesn’t look anything like reqular C- or even C++ code to me beyond the very basic syntax rules (and the same is true for SystemC code that can be used for automatic VHDL synthesis…), which is no surprise given the explicitly parallel nature of it…so you need to learn parallel programming still.
For some reason an old joke about C came to my mind…“C combines all the power of assembly language with all the ease of use of assembly language.”, it couldn’t be more true for those “high level” hardware languages